Constant Voltage Biasing of Common Source Amplifier

The NMOS is biased in saturation with VGS=VA and VDS=VB . Now, on applying a small signal input Vin (having a source resistance of Rs) in series with the bias voltage VA , the voltage at the gate of the NMOS will be VA+Vin . Also, a load resistance RL is connected in series with bias voltage VB such that in the small signal equivalent of the circuit, the other end of RL will be effectively grounded. Doing that makes the voltage at drain VDS=VBIDRL , which is lower than the required bias voltage VB . So, the bias voltage source is adjusted to a value of VB+IDbiasRL

Not so obvious note: In this configuration of CS amplifier, we generally sense the output Vout at the drain terminal of the MOSFET. We have to connect a load like RL (or other similar loads) instead of directly connecting the drain of the NMOS to the bias voltage VB (or to ground in small signal model) because, then the drain and source ends of the MOSFET will be essentially fixed at those voltages allowing no swings at all. So, to convert the ID fluctuations due to the input Vin changes into voltage fluctuations at the output, we pass that ID through a resistor which according to V=IR allows us to sense the voltage across it that changes proportionally with the changing ID

(V_{in})
(V_A)


(R_s)

(R_L)
(V_B)
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The problem with the above configuration is we don't generally have biasing voltage sources whose both terminals are available to tap as one of their terminals is often grounded.
In place of the voltage source VA , we can use a capacitor that is charged to the same bias voltage. We would need a capacitor of infinite capacitance to supply current without dropping in voltage, as there exists a parasitic resistor parallel with the capacitor constantly discharging the capacitor. To tackle this, let's place the voltage source VA as shown in the circuit below.

(V_{in})


(R_s)

(R_L)
(V_B)
(C)

(R_B)
(V_A)
(V_A)
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If the voltage source is directly connected to the capacitor, then the gate voltage of the MOSFET will be fixed at VA not allowing it to sense vin . So let's place a resistor in between and then see the voltage at the gate due to both the sources VA and vin .
By applying superposition

vg=RBRB+RSvin

RB>>RS for most of the vin to appear as vg
Now, to know the safe value of capacitance that will allow the input frequency unimpeded let's include the capacitance in calculating vg at a given frequency ω

vg(jω)=RBRB+RS+1jωCvin(jω)1ωCRB+RS$$

\boxed {C\gg \frac{1}{\omega_{min}(R_{B}+R_{S})}}

So,thecapacitorofthiscapacitancewillallowtheinputofanyfrequency$ωωmin$But,loadcannotbeconnectedinplaceof$RL$,becausewegenerallydonotknowtheexactcharacteristicsoftheload,andthosemightbechangingaswell.Ifweconnectsuchaloadinplaceof$RL$,itmostcertainlywillchangeourbiasingcircuitpotentiallymovingtheMOSFEToutofsaturation.OneotherreasonisthatwedonotintendtolettheDCbiascurrentflowthroughtheload(weonlywanttheamplifiedsignal).Thesolutiontothisistoplacetheload$RL$inparallelto$RD$throughacapacitor$C2$asshowninthemodifiedcircuit.circuitwithoutC2andwithC2showingthepathofDCcurrentIf$RL$isconnecteddirectlywithoutthecapacitor$C2$,theloadwillbecomeapartoftheDCpathandwilldrawapartofDCcurrentalteringtheDCoperatingpointoftheMOSFET.AswedonotwanttheloadtoaltertheDCoperatingpoint,weisolateitwiththehelpof$C2$.Wewantthiscapacitor$C2$toactasshortinsmallsignalmodel.(becauseideally,wewouldhavekeptabatteryofthevoltageequaltotheDCbiasatthedrainterminalinplaceof$C2$tonotletanyDCbiascurrenttoflowthroughthatpath,andthisvoltagesourcewillbeshortedinsmallsignalmodel,soas$C2$isitsequivalent,itshouldalsoofferzeroimpedanceideallytotheamplifiedsignalrequirescircuit)Now,tocalculatetheappropriatecapacitanceof$C2$,weshalllookatthesmallsignalmodel.Wefixedthevalueof$RD$duringbiasing,hence$r0||RD$cannotbealterednow.Forustoseehighergainacross$RL$,muchofthethecurrent$gmvgs$shallflowthroughitsothatitcanseehighervoltageswings.Nowforbetterunderstanding,Iwouldconvertthiscurrentsourceinparallelwith$r0||RD$intoavoltagesourceinserieswiththesame.Nowwecanseethat$r0||RD$,$C2$and$RL$areinserieswiththetransformeddependentvoltagesource.Accordingtothevoltagedividerrule,thecapacitor$C2$shouldbesuchthat$1ωC2RL+(R0||RD)$.(requiressmallsigcircuitwithtransformedsourceshowingthevoltagedivision)Generallythe$V^B>VA$as$VDS>VGS$afterbiasingproperly.Sowecanuseavoltagedividertoachieve$VA$from$V^B$.Thebranchwith$RB$plusthe$VA$shouldbeeffectivereplacedbyavoltagedividersuchthattheTheveninsequivalentvoltageandresistanceseenacrossthenodeofthatbrancharesimilar.Asperthecircuitdiagramsconfigurationbelow,ifwecalculatethesameweget$Rth=R1||R2$and$Vth=V^BR2R1+R2$.Weshouldplace$R1$and$R2$suchthat$Vth=VA$and$RthRB$.Withthisconfigurationjustonevoltagesourceisenoughofthevalue$V^B$,andweshallrefertoitas$VDD$.(circuitoffullsetup)Letscalculatethegainbyredrawingthesmallsignalagain.As$VDD$isshorted,$C1$and$C2$areneglected,asperthecircuitweget$vg=vinR1||R2RS+R1||R2vin$and$vout=id(r0||RD||RL)$where$id=gmvin$(circuitofsmallsignal)